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| inchange semiconductor product specification silicon npn power transistors BUW50 description with to-3pn package high speed switching low saturation voltage applications designed for use in general purpose power amplifier application pinning pin description 1 base 2 collector;connected to mounting base 3 emitter absolute maximum ratings (tc=25 ) symbol parameter conditions value unit v cbo collector-base voltage open emitter 250 v v ceo collector-emitter voltage open base 125 v v ebo emitter-base voltage open collector 7 v i c collector current 25 a i cm collector current-peak 50 a p d totalpower dissipation t c =25 150 w t j junction temperature 175 t stg storage temperature -65~175 thermal characteristics symbol parameter max unit r th j-c thermal resistance junction to case 1.0 /w fig.1 simplified outline (to-3pn) and symbol
inchange semiconductor product specification 2 silicon npn power transistors BUW50 characteristics tj=25 unless otherwise specified symbol parameter conditions min typ. max unit v ceo(sus) collector-emitter sustaining voltage i c =0.2a ;l=25mh 125 v v (br)ebo emitter-base breakdown voltage i e =20ma ;i c =0 7 v v cesat-1 collector-emitter saturation voltage i c =10a; i b =0.5a 0.9 v v cesat-2 collector-emitter saturation voltage i c =20a; i b =2a 1.0 v v besat base-emitter saturation voltage i c =20a; i b =2a 1.6 v i cev collector cut-off current v ce =250v;v be =-1.5v 0.1 ma i ebo emitter cut-off current v eb =5v; i c =0 1.0 ma switching times t on turn-on time 1.9 s t s storage time 1.5 s t f fall time v cc =60v;i c =10a; i b1 =1.0a;pw=20 s 0.5 s inchange semiconductor product specification 3 silicon npn power transistors BUW50 package outline fig.2 outline dimensions |
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